The SPI Bus was specially designed to exchange data between various IC chips, at very high speeds; say, at 180 MHz or even more. Due to this high-speed aspect, the Bus lines cannot be too long, because their reactance increases too much, and the Bus becomes unusable. However, if you want, you could use the SPI Bus outside the PCB at low speeds, but this is not quite practical–the SPI Bus requires 3 or 4 communications lines, which are a bit too many, when compared to 1 or 2 lines usually needed to communicate, efficiently, with field devices located outside the PCB.
Anyway, on the PCB the SPI Bus is very good, because we can practically attach to the Bus as many ICs (or devices) as we want. Please excuse me for not providing a picture of the SPI Bus, but rest assured you do not need one: the SPI Bus is so simple that you will understand everything in words.
The next question is: “Why is this SPI Bus particularly useful?” Besides from exchanging data between various IC chips, the SPI Bus is a method of multiplying microcontroller’s pins. In other words, if you have a tiny 8 pins microcontroller, you could control with that little monster few hundreds of digital Inputs and Outputs. This is impressive, and I am certain many doubt my words. Let’s explain this.
The SPI Bus contains three lines, and they can be on any general I/O controller pins. These Bus lines are: Clock, Data-In, and Data-Out. In addition, each IC connected to the SPI Bus needs an individual Enable line. Things work like this: suppose we have four devices, A, B, C, and D; all of them are wired to the SPI Bus lines, and the Bus itself is wired to seven controller pins–this is 3 Bus lines plus the 4 Enable ones. When we want to send a message to device C, we enable its Enable line first, then we send the message serially, one bit at a time. In the same time devices A, B, and D do exactly nothing, because they are not enabled.
The beauty with the SPI Bus is, it is Synchronous, meaning, when the controller sends the message to one IC, it is also able to receive data from that IC, in the same time. This particular aspect of the SPI protocol is particularly well suited for microcontroller-to-microcontroller communications.
Now, we have seen a small 8 pins microcontroller can control 4 devices (ICs) using 7 pins. Taking into account one device of type A, B, C, or D could have eight or even sixteen I/O ports, this is still far from the hundreds Inputs and Outputs I promised to you. The next beautiful thing about the SPI Bus is: one device IC can be serialized with many more of the same type! For example, we could have B1, B2, B3, B4, B5, and so on. All ICs of type B# are serialized together, and they require only 4 microcontroller pins to make them work; the Enable line is common to all of them. Next, we can use each device of type A, B, C, and D as a group of tens similar ICs.
The enabling speed of each I/O port on the SPI Bus it is slower, when multiplying microcontroller’s pins, but always take into account I/O field devices don’t necessarily need speeds of, say 1000 ON/OFF activations per second each, simply because most of them cannot handle that speed. However, there are few, very smart firmware techniques like the “barrel-shift” type of functions, which allows us to maintain high-speed messaging on the SPI Bus, even if we have hundreds of I/Os. In the same time, the “barrel-shift” functions allow for better time management inside microcontroller, so that it has more time to execute other tasks–makes sense to me! To conclude, I believe it is clear now we can, indeed, build hundreds of efficient I/O lines on a small 8 pins controller.
Further from this general presentation of the SPI Bus, you should be aware almost all ICs implement the SPI protocol in a particular way. For detailed and practical applications I suggest you visit my home site at Corollary Theorems. There you are going to discover a good tutorial book about working with hardware, firmware–including the “barrel-shift” type of functions–and software design, in general, and about few nice and practical implementations of the SPI Bus in particular.